Software Phase Locked Loop 'vga-sync-fields' Revision History
-------------------------------------------------------------

2008-08-11: Version 0.0.2

- removed a possible glitch when updating RADEON_CRTC_H_TOTAL_DISP
- increased precision to determine position of 'trim' scanline

2008-08-08: Version 0.0.1

- reworked everything from scratch
- improved interface to DRM-module
- first approach to implement a PLL in software to lock VGA frame rate
  to an external signal source (e.g. DVB stream frame rate)
- added a standalone utility to monitor/control Soft-PLL status
- added a low level tool to manually adjust Soft-PLL parameters
- fixed scaler bug in RADEONDisplayVideo() (Thanks to Roland Scheidegger)
- found a way how to detect initial field parity on RADEON cards
- added patches from various sources to fix bugs in current 
  CVS xf86-video-ati (Thanks to Andy Burns)
- added switching diagram for my favorite VGA-to-SCART adaptor 
  circuit and (hopefully) some other useful information
- first attempt to write INSTALL, MANUAL, README. These descriptions are
  far from complete (yet).
- successfully tested on various mainboards and ATI RADEON type graphics cards
  including RV100/Radeon 7000 and Asus Pundit ID-3 (RS300/Radeon 9100 IGP)

2008-07-09: Version 0.0.0

- Initial revision.

